# Generated by Xilinx Architecture Wizard # --- UCF Template Only --- # Cut and paste these attributes into the project's UCF file, if desired # INST DCM_INST CLK_FEEDBACK = 1X; # INST DCM_INST CLKDV_DIVIDE = 2.0; # INST DCM_INST CLKFX_DIVIDE = 1; # INST DCM_INST CLKFX_MULTIPLY = 4; # INST DCM_INST CLKIN_DIVIDE_BY_2 = FALSE; # INST DCM_INST CLKIN_PERIOD = 20.0; # INST DCM_INST CLKOUT_PHASE_SHIFT = NONE; # INST DCM_INST DESKEW_ADJUST = SYSTEM_SYNCHRONOUS; # INST DCM_INST DFS_FREQUENCY_MODE = LOW; # INST DCM_INST DLL_FREQUENCY_MODE = LOW; # INST DCM_INST DUTY_CYCLE_CORRECTION = TRUE; # INST DCM_INST FACTORY_JF = C080; # INST DCM_INST PHASE_SHIFT = 0; # INST DCM_INST STARTUP_WAIT = FALSE; net CLK period = 20 ns ; NET "CLK" LOC = "T9"; # pb_in<0> is the righmost push button: NET "pb_in<0>" LOC = "M13"; NET "pb_in<1>" LOC = "M14"; NET "pb_in<2>" LOC = "L13"; # NET "pb_in<3>" LOC = "L14"; # led_out<0> is the righmost. NET "led_out<0>" LOC = "K12"; NET "led_out<1>" LOC = "P14"; NET "led_out<2>" LOC = "L12"; NET "led_out<3>" LOC = "N14"; NET "led_out<4>" LOC = "P13"; NET "led_out<5>" LOC = "N12"; NET "led_out<6>" LOC = "P12"; NET "led_out<7>" LOC = "P11"; # digit_out<0> is anode for the righmost, digit_out<3> for the leftmost # segment: NET "digit_out<0>" LOC = "D14"; NET "digit_out<1>" LOC = "G14"; NET "digit_out<2>" LOC = "F14"; NET "digit_out<3>" LOC = "E13"; # segment encoding # 0 # --- # 5 | | 1 # --- <- 6 # 4 | | 2 # --- . <- 7 # 3 NET "seg_out<0>" LOC = "E14"; NET "seg_out<1>" LOC = "G13"; NET "seg_out<2>" LOC = "N15"; NET "seg_out<3>" LOC = "P15"; NET "seg_out<4>" LOC = "R16"; NET "seg_out<5>" LOC = "F13"; NET "seg_out<6>" LOC = "N16"; NET "seg_out<7>" LOC = "P16"; # sw_in<0> is the righmost, sw_in<7> the leftmost slide switch: NET "sw_in<0>" LOC = "F12"; NET "sw_in<1>" LOC = "G12"; NET "sw_in<2>" LOC = "H14"; #NET "sw_in<3>" LOC = "H13"; #NET "sw_in<4>" LOC = "J14"; #NET "sw_in<5>" LOC = "J13"; #NET "sw_in<6>" LOC = "K14"; #NET "sw_in<7>" LOC = "K13";