/* lauta6 - Test for Mefisto Board through User Extension Port and Interface. */

module lauta6(CLK,PB_IN,SW_IN,BCOL_IN,BCOL_OUT,BROW,LED_OUT);
input CLK;
input [3:0] PB_IN;
input [7:0] SW_IN;
input [7:0] BCOL_IN;
output [7:0] BCOL_OUT;
output [7:0] BROW;
output [7:0] LED_OUT;


wire RST = PB_IN[3];

reg [7:0] BOARD[7:0];
wire [7:0] PIECES[7:0];


mefi8x8a BOARD_IO(.CLK(CLK),
                  .BCOL_IN(BCOL_IN),
                  .BCOL_OUT(BCOL_OUT),
                  .BROW(BROW),
                  .LEDS2LIT({BOARD[7],BOARD[6],BOARD[5],BOARD[4],BOARD[3],BOARD[2],BOARD[1],BOARD[0]}),
                  .PIECES_ON_BOARD({PIECES[7],PIECES[6],PIECES[5],PIECES[4],PIECES[3],PIECES[2],PIECES[1],PIECES[0]})
                 );

// assign LED_OUT = {BOARD[0][0],BOARD[0][1],BOARD[0][2],BOARD[0][3],BOARD[0][4],BOARD[0][5],BOARD[0][6],BOARD[0][7]};
assign LED_OUT = {PIECES[0][0],PIECES[0][1],PIECES[0][2],PIECES[0][3],PIECES[0][4],PIECES[0][5],PIECES[0][6],PIECES[0][7]};

integer i; // A "compile-time" index to board rows. (for the for loop).

always @(posedge CLK)
  begin
   if(RST)
    begin
      for(i=0; i<8; i=i+1) BOARD[i] = (8'b01010101);
    end
   else
    begin
      for(i=0; i<8; i=i+1) BOARD[i] = PIECES[i];
    end
  end

endmodule