/* lauta4 - Test for Mefisto Board through User Extension Port and Interface. */

module lauta4(CLK,PB_IN,SW_IN,BCOL_IN,BCOL_OUT,BROW,LED_OUT);
input CLK;
input [3:0] PB_IN;
input [7:0] SW_IN;
input [7:0] BCOL_IN;
output [7:0] BCOL_OUT;
output [7:0] BROW;
output [7:0] LED_OUT;

reg [7:0] USR1IN = 8'b0;
reg [7:0] USR1OUT = 8'b0;

// The multiplexed row, 8-bit shift register:
reg [7:0] sel_row = 8'b00000001;

// assign BCOL_OUT = ~BCOL_IN;
assign BCOL_OUT = USR1OUT;
assign BROW = sel_row;
assign LED_OUT = ~USR1IN;


parameter msb = 26;
reg [msb:0] delay_counter = 0;


always @(posedge CLK)
  begin
   delay_counter <= delay_counter+1; // Wraps around, eventually.
   USR1IN  <= {BCOL_IN[0],BCOL_IN[1],BCOL_IN[2],BCOL_IN[3],BCOL_IN[4],BCOL_IN[5],BCOL_IN[6],BCOL_IN[7]};
   USR1OUT <= {SW_IN[0],SW_IN[1],SW_IN[2],SW_IN[3],SW_IN[4],SW_IN[5],SW_IN[6],SW_IN[7]};
// USR1OUT[3:0] <= {PB_IN[0],PB_IN[1],PB_IN[2],PB_IN[3]};
// USR1OUT[7:4] <= {PB_IN[0],PB_IN[1],PB_IN[2],PB_IN[3]};
   if(0 == delay_counter)
     sel_row <= {sel_row[6],sel_row[5],sel_row[4],sel_row[3],sel_row[2],sel_row[1],sel_row[0],sel_row[7]};
  end

endmodule