/* inc17fexb: by karttu, Jan 30 2005.
              Increment the 17-digit factorial expansion
              specified in one-bit register in_f1 (the least
              significant digit) and the next sixteen digits
              in 16 binary registers (in_f2 - in_f17)
              and give the results in out_fo - out_f17.

              Note that in_f0 could be also used as a kind
              of "enable incrementing" signal, because
              the incrementing is carried only when
              it is 1. (However, out_f0 is always ~in_f0).
 */

module inc17fexb(input in_f1,       // 0-1
                 input [1:0] in_f2, // 0-2 (2b'00, 2b'01 or 2b'10)
                 input [1:0] in_f3, // 0-3 (2b'00, 2b'01, 2b'10 or 2b'11)
                 input [2:0] in_f4, // 0-4 (3b'000 - 3b'100)
                 input [2:0] in_f5, // 0-5
                 input [2:0] in_f6, // 0-6
                 input [2:0] in_f7, // 0-7
                 input [3:0] in_f8, // 0-8
                 input [3:0] in_f9, // 0-9
                 input [3:0] in_f10, // 0-10
                 input [3:0] in_f11, // 0-11
                 input [3:0] in_f12, // 0-12
                 input [3:0] in_f13, // 0-13
                 input [3:0] in_f14, // 0-14
                 input [3:0] in_f15, // 0-15
                 input [4:0] in_f16, // 0-16
                 input [4:0] in_f17, // 0-17

                 output out_f1,
                 output [1:0] out_f2,
                 output [1:0] out_f3,
                 output [2:0] out_f4,
                 output [2:0] out_f5,
                 output [2:0] out_f6,
                 output [2:0] out_f7,
                 output [3:0] out_f8,
                 output [3:0] out_f9,
                 output [3:0] out_f10,
                 output [3:0] out_f11,
                 output [3:0] out_f12,
                 output [3:0] out_f13,
                 output [3:0] out_f14,
                 output [3:0] out_f15,
                 output [4:0] out_f16,
                 output [4:0] out_f17);


// How to do this with generate loop(s) ?

wire wrap2  =  (in_f1 && (2 == in_f2));
wire wrap3  =  (wrap2 && (3 == in_f3));
wire wrap4  =  (wrap3 && (4 == in_f4));
wire wrap5  =  (wrap4 && (5 == in_f5));
wire wrap6  =  (wrap5 && (6 == in_f6));
wire wrap7  =  (wrap6 && (7 == in_f7));
wire wrap8  =  (wrap7 && (8 == in_f8));
wire wrap9  =  (wrap8 && (9 == in_f9));
wire wrap10 =  (wrap9 && (10 == in_f10));
wire wrap11 = (wrap10 && (11 == in_f11));
wire wrap12 = (wrap11 && (12 == in_f12));
wire wrap13 = (wrap12 && (13 == in_f13));
wire wrap14 = (wrap13 && (14 == in_f14));
wire wrap15 = (wrap14 && (15 == in_f15));
wire wrap16 = (wrap15 && (16 == in_f16));
wire wrap17 = (wrap16 && (17 == in_f17));

// Note that we have "autowrapping" for the digits at
// positions (2^n)-1:

assign out_f1 = ~in_f1;

assign out_f2  =  (in_f1 ? (wrap2 ? 0 : in_f2+1) : in_f2);
assign out_f3  =  (wrap2 ? in_f3+1 : in_f3);
assign out_f4  =  (wrap3 ? (wrap4 ? 0 : in_f4+1) : in_f4);
assign out_f5  =  (wrap4 ? (wrap5 ? 0 : in_f5+1) : in_f5);
assign out_f6  =  (wrap5 ? (wrap6 ? 0 : in_f6+1) : in_f6);
assign out_f7  =  (wrap6 ? in_f7+1 : in_f7);
assign out_f8  =  (wrap7 ? (wrap8 ? 0 : in_f8+1) : in_f8);
assign out_f9  =  (wrap8 ? (wrap9 ? 0 : in_f9+1) : in_f9);
assign out_f10 =  (wrap9 ? (wrap10 ? 0 : in_f10+1) : in_f10);
assign out_f11 = (wrap10 ? (wrap11 ? 0 : in_f11+1) : in_f11);
assign out_f12 = (wrap11 ? (wrap12 ? 0 : in_f12+1) : in_f12);
assign out_f13 = (wrap12 ? (wrap13 ? 0 : in_f13+1) : in_f13);
assign out_f14 = (wrap13 ? (wrap14 ? 0 : in_f14+1) : in_f14);
assign out_f15 = (wrap14 ? in_f15+1 : in_f15);
assign out_f16 = (wrap15 ? (wrap16 ? 0 : in_f16+1) : in_f16);
assign out_f17 = (wrap16 ? (wrap17 ? 0 : in_f17+1) : in_f17);


endmodule