JDF G
// Created by Project Navigator ver 1.0
PROJECT esim17
DESIGN esim17
DEVFAM spartan3
DEVFAMTIME 0
DEVICE xc3s200
DEVICETIME 0
DEVPKG ft256
DEVPKGTIME 0
DEVSPEED -4
DEVSPEEDTIME 0
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Other
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL Verilog
GENERATEDSIMULATIONMODELTIME 0
SOURCE esim17.v
SOURCE issia.v
SOURCE vga4word.v
SOURCE vgatimer.v
SOURCE muskpak1.v
SOURCE ps2mbits.v
SOURCE debounce.v
SOURCE syncinp.v
SOURCE shw4spec.v
DEPASSOC esim17 esim17.ucf
[STATUS-ALL]
esim17.bitgenGroup=OK,1111714814
[STRATEGY-LIST]
Normal=True