JDF G
// Created by Project Navigator ver 1.0
PROJECT esim10
DESIGN esim10
DEVFAM spartan3
DEVFAMTIME 0
DEVICE xc3s200
DEVICETIME 0
DEVPKG ft256
DEVPKGTIME 0
DEVSPEED -4
DEVSPEEDTIME 0
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Other
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL Verilog
GENERATEDSIMULATIONMODELTIME 0
SOURCE esim10.v
SOURCE debounce.v
SOURCE show4let.v
DEPASSOC esim10 esim10.ucf
[STATUS-ALL]
esim10.bitgenGroup=OK,1104620215
[STRATEGY-LIST]
Normal=True